1. Field of the Invention
The present invention relates to a semiconductor device having two kinds of transistors of different gate widths and a method for manufacturing the same.
2. Description of the Related Art
Currently, MOS transistors are used in many integrated circuits. As a material of a gate electrode of the MOS transistor, polysilicon is mainly used from the standpoint of process consistency etc. However, since silicon is a semiconductor, its resistance is large unless impurities are introduced. Because of this, the impurities are introduced into the polysilicon. But, if the amount of impurities introduced is small, it is not possible to sufficiently reduce its resistance. Further, when the amount of impurities is small, there exists a depletion layer at the boundary surface with a gate insulating film, which makes it impossible to attain a sufficient performance. Thereupon, with the transistor manufactured in recent years, the impurities are introduced into the polysilicon as much as possible.
As one of methods for introducing many impurities, a method is employed, in which after forming polysilicon film constituting the gate electrode, impurities are introduced and, further, after working the polysilicon film into a shape of the gate electrode, the second introduction of impurities is made. However, at the second introduction, there is a restriction to implantation energy and a dose amount from the standpoint of transistor characteristics because implantation into a source/drain diffusion layer of the transistor is also carried out simultaneously. On the other hand, there is no such restriction at the first introduction. Because of this, it is possible to obtain the desired transistor characteristics by controlling a concentration of the impurities of the gate electrode at the first introduction.
However, as the transistor is miniaturized, the situation starts to occur in which the desired characteristics, in particular, reliability in accordance with design is not obtained.
Related arts are disclosed in Japanese Patent Application Laid-open No. 2000-77538 (Patent Document 1), Japanese Patent Application Laid-open No. 2001-284464 (Patent document 2), and Japanese Patent Application Laid-open No. 2001-274262 (Patent document 3).